A.I.
Hardware · Reference
TSMC and chip manufacturing
Most companies that design AI chips do not make them. They send the design to a foundry, a factory that makes chips for other companies. TSMC, the Taiwan Semiconductor Manufacturing Company, is the largest. The chip designer picks a process node, the factory recipe; a smaller number such as 3nm or 2nm marks a newer recipe that fits more transistors in the same space and usually uses less power. A transistor is the tiny switch chips are made of.
Where TSMC's newest nodes stand
| Node | Status, per TSMC |
|---|---|
| N3 (3nm) | First foundry in high-volume production, 2022 |
| N2 (2nm) | Volume production started 4Q 2025, at Fab 20 and Fab 22 |
| N2P | Volume production scheduled for second half of 2026 |
| A16, A14, A12 | Next nodes; A16 and A12 add a backside power rail |
Source: TSMC's technology page (TSMC, 2nm technology). N2 is TSMC's first node with nanosheet transistors, a newer transistor shape. A backside power rail feeds power from under the chip, leaving more room for wiring on top. 4Q means the fourth quarter.
AI chips that name their TSMC node
| Chip | Process | Source page |
|---|---|---|
| Microsoft Maia 300 | Compute die on TSMC N2P | Maia |
| Microsoft Maia 200 | TSMC 3nm | Maia |
| AWS Trainium3 | 3nm (AWS does not name the foundry on the pages cited) | Trainium3 |
Packaging matters as much as the node. An AI chip package joins compute dies and HBM stacks on one base so they can talk fast; see HBM memory. A chip plant planned by SpaceX and Tesla is on the Terafab page.